 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| HD74ALVC16835 18-bit Universal Bus Driver with 3-state Outputs REJ03D0053-0700 (Previous: ADE-205-192E) Rev.7.00 Apr 07, 2006 Description The HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode when the latch enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip flop on the low to high transition of the CLK. When OE is high, the outputs are in the high impedance state. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup register; the minimum value of the register is determined by the current sinking capability of the driver. ined Features * * * * * * Meets "PC SDRAM registered DIMM design support document, Rev. 1.2" VCC = 2.3 V to 3.6 V Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) High output current 24 mA (@VCC = 3.0 V) Ordering Information Part Name Package Type Package Code (Previous code) PTSP0056KA-A (TTP-56DAV) T Package Abbreviation Taping Abbreviation (Quantity) EL (1,000 pcs / Reel) HD74ALVC16835TEL TSSOP-56 pin Function Table Inputs OE H L L L L L L H: L: X: Z: : Notes: LE X H H L L L L CLK X X X H L A X L H L H X X Output Y Z L H L H *1 Y0 Y0 *2 High level Low level Immaterial High impedance Low to high transition 1. Output level before the indicated steady-state input conditions were established, provided that CLK was high before LE went low. 2. Output level before the indicated steady-state input conditions were established. Rev.7.00 Apr 07, 2006 page 1 of 11 HD74ALVC16835 Pin Arrangement NC 1 NC 2 Y1 3 GND 4 Y2 5 Y3 6 VCC 7 Y4 8 Y5 9 Y6 10 GND 11 Y7 12 Y8 13 Y9 14 Y10 15 Y11 16 Y12 17 GND 18 Y13 19 Y14 20 Y15 21 VCC 22 Y16 23 Y17 24 GND 25 Y18 26 OE 27 LE 28 (Top view) 56 GND 55 NC 54 A1 53 GND 52 A2 51 A3 50 VCC 49 A4 48 A5 47 A6 46 GND 45 A7 44 A8 43 A9 42 A10 41 A11 40 A12 39 GND 38 A13 37 A14 36 A15 35 VCC 34 A16 33 A17 32 GND 31 A18 30 CLK 29 GND Rev.7.00 Apr 07, 2006 page 2 of 11 HD74ALVC16835 Absolute Maximum Ratings Item Supply voltage range Input voltage range *1 Output voltage range *1, 2 Input clamp current Output clamp current Continuous output current VCC, GND current / pin Maximum power dissipation *3 at Ta = 55C (in still air) Storage temperature range Symbol VCC VI VO IIK IOK IO ICC or IGND PT Tstg Ratings -0.5 to 4.6 -0.5 to 4.6 -0.5 to VCC+0.5 -50 50 50 100 1 -65 to 150 Unit V V V mA mA mA mA W C Conditions VI < 0 VO < 0 or VO > VCC VO = 0 to VCC TSSOP Notes: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating condition" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp current ratings he are observed. 2. The input and output positive-voltage ratings may be exceeded up to 4.6 V if the input and output clampive-voltage current ratings are observed. 3. The maximum power dissipation is calculated using a junction temperature of 150C and board trace length g of 750 mils. Recommended Operating Conditions Item Supply voltage Input voltage Output voltage High-level output current Symbol VCC VI VO IOH Min 2.3 0 0 -- -- -- -- -- -- 0 -40 Max 3.6 VCC VCC -12 -12 -24 12 12 24 10 85 Unit V V V mA Conditions Low-level output current IOL mA VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V Input transition rise or fall rate Operating free-air temperature t/v t/v Ta ns/V C Note: Unused or floating control pins must be held high or low. Rev.7.00 Apr 07, 2006 page 3 of 11 HD74ALVC16835 Logic Diagram OE CLK LE A1 27 30 28 54 1D C1 CLK 3 Y1 To 17 Other Channels Electrical Characteristics (Ta = -40 to 85C) Item Input voltage Symbol VIH VIL Output voltage VOH VCC (V) 2.3 to 2.7 2.7 to 3.6 2.3 to 2.7 2.7 to 3.6 2.3 to 3.6 2.3 2.3 2.7 3.0 3.0 2.3 to 3.6 2.3 2.3 2.7 3.0 3.6 3.6 3.6 3.0 to 3.6 Min 1.7 2.0 -- -- VCC-0.2 2.0 1.7 2.2 2.4 2.0 -- -- -- -- -- -- -- -- -- Max -- -- 0.7 0.8 -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 5.0 10 40 750 Unit V V V IOH = -100 A IOH = -6 mA, VIH = 1.7 V IOH = -12 mA, VIH = 1.7 V IOH = -12 mA, VIH = 2.0 V IOH = -12 mA, VIH = 2.0 V IOH = -24 mA, VIH = 2.0 V IOL = 100 A IOL = 6 mA, VIL = 0.7 V IOL = 12 mA, VIL = 0.7 V IOL = 12 mA, VIL = 0.8 V IOL = 24 mA, VIL = 0.8 V VIN = VCC or GND VOUT = VCC or GND VIN = VCC or GND One input at (VCC-0.6)V, other inputs at VCC or GND Test Conditions VOL V Input current Off state output current Quiescent supply current IIN IOZ ICC ICC A A A A Rev.7.00 Apr 07, 2006 page 4 of 11 HD74ALVC16835 Switching Characteristics (Ta = -40 to 85C) Item Maximum clock frequency Propagation delay time Symbol fmax VCC (V) 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 3.3 3.3 3.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 Hold time th 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 2.50.2 2.7 3.30.3 Min 150 150 150 1.0 -- 1.0 1.3 -- 1.3 1.4 -- 1.4 1.4 -- 1.1 1.0 -- 1.3 3.0 3.0 3.0 2.2 2.1 1.7 1.9 1.6 1.5 1.3 1.1 1.0 0.6 0.6 0.7 1.4 1.7 1.4 3.3 3.3 3.3 3.3 3.3 3.3 Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.5 6.0 7.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max -- -- -- 4.2 4.2 3.6 5.0 4.9 4.2 5.5 5.2 4.5 5.5 5.6 4.6 4.5 4.3 3.9 7.0 9.0 9.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ns Unit MHz From (Input) To (Output) tPLH tPHL ns A Y LE Y CLK Y Output enable time tZH tZL tHZ tLZ CIN CO tsu ns OE Y Output disable time ns OE Y Input capacitance Output capacitance Setup time pF pF ns Control inputs Data inputs Y ports Data before CLK Data before LE CLK "H" Data before LE CLK "L" Data after CLK Data after LE CLK "H" or "L" ns LE "H" Pulse width tw CLK "H" or "L" Rev.7.00 Apr 07, 2006 page 5 of 11 HD74ALVC16835 Switching Characteristics (cont.) (Ta = 0 to 85C) Item Propagation delay time CL=0pF *1 CL=50pF CL=0pF *1 CL=50pF CL=50pF CL=50pF Symbol VCC (V) Min 0.9 1.0 1.5 1.7 1.7 1.0 Typ -- -- -- -- -- -- Max 2.0 4.5 3.0 4.5 4.8 2.5 Unit ns A CLK CLK, A volts/ ns FROM (Input) Y Y Y Y TO (Output) Output rise / fall time tPLH, tPHL 3.30.165 3.30.165 3.30.165 3.30.165 *1, 2 tSSO 3.30.165 tTLH, tTHL *1 3.30.165 Notes: 1. This parameter is characterized but not tested. 2. tSSO : Simultaneous switching output time. Operating Characteristics (Ta = 25C) Item Power dissipation capacitance Outputs enable Outputs disable Symbol Cpd VCC = 2.50.2 V VCC = 3.30.3 V Typ 22.0 5.0 Typ 24.5 6.0 Unit pF Test Conditions CL = 0, f = 10 MHz Test Circuit See under table 500 S1 OPEN GND *1 CL 500 Load Circuit for Outputs Symbol t PLH / t PHL t su / t h / t w t ZH/ t HZ t ZL / t LZ CL Vcc=2.50.2V Vcc=2.7V, 3.30.3V OPEN GND 2 x VCC 30 pF OPEN GND 6.0 V 50 pF Note: 1. CL includes probe and jig capacitance. Rev.7.00 Apr 07, 2006 page 6 of 11 HD74ALVC16835 Waveforms - 1 tr 90 % Input 10 % t PLH Vref 90 % Vref 10 % t PHL tf VIH GND VOH Output Vref Vref VOL Waveforms - 2 tr 90 % Timing Input 10 % tsu Vref th GND VIH Data Input Vref Vref GND tw VIH Input Vref Vref GND VIH Rev.7.00 Apr 07, 2006 page 7 of 11 HD74ALVC16835 Waveforms - 3 tf Output Control 90 % Vref 10 % t ZL Vref t ZH Waveform - B Vref t HZ Vref2 10 % t LZ tr 90 % Vref GND VOH1 Waveform - A Vref1 VOL VOH VOL1 TEST VIH Vref Vref1 Vref2 VOH1 VOL1 Vcc=2.50.2V Vcc=2.7V, 3.30.3V VIH VCC 2.7 V 1/2 VCC 1.5 V VOL +0.15 V VOL +0.3 V VOH-0.15 V VOH-0.3 V VCC GND 3.0 V GND Notes: 1. All input pulses are supplied by generators having the following characteristics : rators PRR 10 MHz, Zo = 50 , tr 2.0 ns, tf 2.0 ns. (VCC = 2.50.2 V) PRR 10 MHz, Zo = 50 , tr 2.5 ns, tf 2.5 ns. (VCC = 2.7 V, 3.30.3 V) 2. Waveform-A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform-B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The outputs are measured one at a time with one transition per measurement. Rev.7.00 Apr 07, 2006 page 8 of 11 HD74ALVC16835 IV Characteristics for Register Output (Measured value) Weak condition HIGH Vcc = 3.15 V, Ta = 85C VOH (V) 0.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -20 I OH (mA) -40 -60 -80 -100 Strong condition HIGH Vcc = 3.45 V, Ta = 0C VOH (V) 0.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -30 I OH (mA) -60 -90 -120 -150 Rev.7.00 Apr 07, 2006 page 9 of 11 HD74ALVC16835 Weak condition LOW Vcc = 3.15 V, Ta = 85C 120 100 80 I OL (mA) 60 40 20 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VOL (V) Strong condition LOW Vcc = 3.45 V, Ta = 0C 200 150 I OL (mA) 100 50 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VOL (V) Rev.7.00 Apr 07, 2006 page 10 of 11 HD74ALVC16835 Package Dimensions JEITA Package Code P-TSSOP56-6.1x14-0.50 RENESAS Code PTSP0056KA-A Previous Code TTP-56DAV MASS[Typ.] 0.32g *1 D F 29 56 bp NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. Index mark *2 HE E Terminal cross section ( Ni/Pd/Au plating ) 1 Z e *3 28 L1 bp x M c Reference Dimension in Millimeters Symbol Min A1 y L Detail F D E A2 A1 A bp b1 c c1 HE e x y Z L L1 Nom Max 14.0 14.2 6.10 0.08 0.13 0.18 1.20 0.14 0.19 0.24 0.10 0.15 0.20 0 8 7.90 8.10 8.30 0.50 0.08 0.10 0.65 0.4 0.5 0.6 1.0 Rev.7.00 Apr 07, 2006 page 11 of 11 A Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's Technology Corp. or a third party. application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas T 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of i improvements publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvement or other reasons. It is distributor for the latest product therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distrib information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Technology Corp. Semiconductor Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Techn home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life ci is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a aerospace, nuclear, or undersea repeater product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. materi 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and lic cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. http://www.renesas.com/en/network" Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145 http://www.renesas.com Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510 (c) 2006. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .6.0 |
Price & Availability of HD74ALVC16835
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |